Utilizing 3D metal-insulator-metal capacitor structures, CEA-Leti and IPDiA (France) utilized their common lab arrangement to develop a new process based on depositing medium-K dielectrics to achieve capacitance densities of 550nF/mm2.
CEA-Leti and IPDiA were funded under the PRIIM initiative (Platform for the Realization of shared Industrial Innovation) by OSEO to develop a process for increasing capacitance density on 3D structures. Atomic Layer Deposition (ALD) was utilized to achieve conformal coating in high aspect ratio geometries and control thicknesses at the atomic level. A capacitance density of 550nF/mm2 was achieved while keeping leakage and parasitic effects at levels similar to a lower density process previously demonstrated. They unveiled their results at the Device Packaging Conference in Scottsdale/Fountain Hills, Arizona (USA) in March 2012.
PICS (Passive Integration Connecting Substrate) high-density capacitors take advantage of increased surface area in the 3D structure without increasing the footprint of the capacitor. The demonstrated stability with regards to temperature, voltage, and aging in addition to reliability and low ESR/ESL makes the PICS technology an alternative to discrete components – especially in high reliability applications. Applications that can benefit from competitive performance in a smaller volume include: medical, harsh environments, automotive, communications, industrial, defense, and aerospace.
Intrinsic applications that can immediately benefit from these demonstrated improvements include DC/DC converter, IC decoupling, MEMS, integrated sensors, memory sticks, and smartcards. The next steps are to develop the technology for market deployment in next generation 3D products. IPDiA and CEA-Leti are continuing development with PICS as they seek to achieve 1uF/mm2.
Photo Courtesy IPDiA